FIG. 7 is a circuit diagram showing an oscillator having an MOS capacitor shown in JP-A-2000-252480. The oscillator shown in the drawing is a voltage controlled oscillator (may hereinafter be referred to as VCO II) whose oscillation frequency can be controlled by a control voltage Vc. This type of VCO II has external connection terminals 121, 122 for connection of a crystal resonator 110 to be connected externally. The VCO II also has a CMOS inverter 123, and the CMOS inverter 123 is integral with a bias resistor Rf 126 connected between an input-side terminal 124 and an output-side terminal 125 thereof to constitute an amplifier circuit. Between the output-side terminal 125, serving as the output terminal of the amplifier circuit of the VCO II, and the external connection terminal 122, a resistor Rd 127 is connected. A capacitor Cd 128 is connected to the external connection terminal 122, and an adjusting external additional capacitor Co 115 (not required if unnecessary) is connected by external mounting to a Co capacitor connection terminal 129 provided between the external connection terminal 122 and the capacitor Cd 128.
To the external connection terminal 121, a capacitor Cg 131, a varicap 50 as an MOS variable capacitance element, and a resistor R1 133 are connected via a capacitor Cp 130 which shuts off a direct-current voltage. A control voltage Vc is applied to the other end of the resistor R1 133.
The resistor Rd 127, the crystal resonator 110, the capacitor Cd 128, the adjusting external additional capacitor Co 115, the capacitor Cg 131, the varicap 50, and the capacitor Cp 130 form a resonance circuit, and such a resonance circuit is driven by the amplifier circuit composed of the CMOS inverter 123 and the bias resistor Rf 126.
The crystal resonator 110 connected to the output side of the amplifier circuit has an opposite-side terminal connected to the external connection terminal 121, and an output from the above-mentioned resonance circuit is provided as feedback to the input-side terminal 124 of the amplifier circuit from the external connection terminal 121.
The control voltage Vc is applied to the varicap 50 via the resistor R1 133 to change the capacitance of the varicap 50 in response to the direct-current voltage value of the control voltage Vc.
With the VCO II configured as above, an oscillation frequency f0 is determined by a combined capacitance formed by the capacitor Cd 128, adjusting external additional capacitor Co 115, capacitor Cg 131, varicap 50 and direct-current shut-off capacitor Cp 130 which constitute the resonance circuit. Thus, the capacitance of the varicap 50 is changed by the voltage of the control voltage Vc, whereby the oscillation frequency f0 can be controlled to an arbitrary value.
The varicap 50 disclosed in JP-A-2000-252480 is designed to have a wide capacitance variable range (i.e., a large capacitance variable width), so that a wide frequency variable range (i.e., a large frequency variable width) can be ensured for the VCO II having the varicap 50 applied thereto. In summary, the structure of an MOS capacitor having a gate electrode formed on a P− type semiconductor substrate via an insulating film, for example, is configured such that an N+ type impurity region is formed in the vicinity of a region of the P− type semiconductor substrate opposing the gate electrode, and a direct-current voltage can be applied to the N+ type impurity region via a contact hole, although details of the structure will be described later. By applying the DC voltage to the N+ type impurity region, it is attempted to prevent a strong inversion layer from being formed in the region of the P− type semiconductor substrate opposing the gate electrode, thereby avoiding the saturation of variable capacitance characteristics. As a result, the variable capacitance range of the varicap 50 can be widened by the voltage applied to the N+ type impurity region.